1. Field of the Invention
This invention relates generally to the field of semiconductor device manufacturing and, more particularly, to a method and apparatus for determining feature characteristics using scatterometry.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in a continual improvement in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing the defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
The technologies underlying semiconductor processing tools have attracted increased attention over the last several years, resulting in substantial refinements. However, despite the advances made in this area, many of the processing tools that are currently commercially available suffer certain deficiencies. In particular, such tools often lack advanced process data monitoring capabilities, such as the ability to provide historical parametric data in a user-friendly format, as well as event logging, real-time graphical display of both current processing parameters and the processing parameters of the entire run, and remote, i.e., local site and worldwide, monitoring. These deficiencies can engender nonoptimal control of critical processing parameters, such as throughput, accuracy, stability and repeatability, processing temperatures, mechanical tool parameters, and the like. This variability manifests itself as within-run disparities, run-to-run disparities and tool-to-tool disparities that can propagate into deviations in product quality and performance, whereas an ideal monitoring and diagnostics system for such tools would provide a means of monitoring this variability, as well as providing means for optimizing control of critical parameters. Semiconductor devices are manufactured from wafers of a substrate material. Layers of materials are added, removed, and/or treated during fabrication to create the electrical circuits that make up the device. The fabrication essentially comprises four basic operations. Although there are only four basic operations, they can be combined in hundreds of different ways, depending upon the particular fabrication process.
The four operations typically used in the manufacture of semiconductor devices are:
layering, or adding thin layers of various materials to a wafer from which a semiconductor device is produced;
patterning, or removing selected portions of added layers;
doping, or placing specific amounts of dopants in the wafer surface through openings in the added layers; and
heat treatment, or heating and cooling the materials to produce desired effects in the processed wafer.
Among the important aspects in semiconductor device manufacturing are rapid thermal annealing (RTA) control, chemical-mechanical polishing (CMP) control, etch control, and photolithography control. As technology advances facilitate smaller critical dimensions for semiconductor devices, the need for reduction of errors increases dramatically. Proper formation of sub-sections within a semiconductor device is an important factor in ensuring proper performance of the manufactured semiconductor device. Critical dimensions of the sub-sections generally have to be within a predetermined acceptable margin of error for semiconductor devices to be within acceptable manufacturing quality.
An important aspect of semiconductor manufacturing is overlay control. Overlay is one of several important steps in the photolithography area of semiconductor manufacturing. Overlay control involves measuring the misalignment between two successive patterned layers on the surface of a semiconductor device. Generally, minimization of misalignment errors is important to ensure that the multiple layers of the semiconductor devices are connected and functional. As technology facilitates smaller critical dimensions for semiconductor devices, the need for the reduction of misalignment errors increases dramatically.
Generally, a set of photolithography steps is performed on a lot of wafers using a semiconductor manufacturing tool commonly referred to as an exposure tool or a stepper. The manufacturing tool communicates with a manufacturing framework or a network of processing modules. The manufacturing tool is generally connected to an equipment interface. The equipment interface is connected to a machine interface to which the stepper is connected, thereby facilitating communications between the stepper and the manufacturing framework. The machine interface may generally be part of an advanced process control (APC) system. The APC system initiates a control script, which can be a software program that automatically retrieves the data needed to execute a manufacturing process. The input parameters that control the manufacturing process are revised periodically in a manual fashion. As the need for higher precision manufacturing processes are required, improved methods are needed to revise input parameters that control manufacturing processes in a more automated and timely manner.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.
One aspect of the present invention is seen in a method for characterizing features. The method includes measuring a dimensional characteristic of a first grating structure illuminating at least a portion of a first feature and the first grating structure, the first feature being formed over at least a portion of the first grating structure; measuring light reflected from the illuminated portion of the first feature and the first grating structure to generate a reflection profile selecting at least one reference reflection profile based on the measured dimensional characteristic of the first grating structure; comparing the generated reflection profile to the selected reference reflection profile; and determining a characteristic of the first feature based on the comparison between the measured reflection profile and the selected reference reflection profile.
Another aspect of the present invention is seen in a processing line including a first metrology tool and a second metrology tool. The first metrology tool is adapted to measure a dimensional characteristic of a first grating structure. The second metrology tool includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of a first feature and the first grating structure. The first feature is formed over at least a portion of the first grating structure. The detector is adapted to measure light reflected from the illuminated portion of the first feature and the first grating structure to generate a reflection profile, The data processing unit is adapted to select at least one reference reflection profile based on the measured dimensional characteristic of the first grating structure, comparing the generated reflection profile to the selected reference reflection profile, and determine a characteristic of the first feature based on the comparison between the measured reflection profile and the selected reference reflection profile.